This invention relates to circuits and methods for providing rail-to-rail output stages. More particularly, this invention relates to circuits and methods for rail-to-rail output stages that provide high linearity without the use of feedback, that provide high linearity in their transconductance, that allow for designer-controllable idling currents, and that provide those designer-controllable idling currents independently of manufacturing processes, temperatures, and power supply voltages.
Rail-to-rail output stages are widely known in the prior art. The typical rail-to-rail output stage incorporates two common-source (or common-emitter) transistors of complementary polarities whose drains (or collectors) are connected together to form an output node that is connected to a load, whose sources (or emitters) are connected to a positive and a negative power supply voltage, and whose gates (or bases) are connected to two drive signals derived in turn from an external input signal. These output stages are very useful in that they maximize the output signal voltage swing capability of a circuit to nearly the limits of the power supply and, consequently, provide a maximal signal-to-noise ratio for a given noise level.
Many known circuits and methods for providing rail-to-rail output stages, however, exhibit very non-linear input to output transfer characteristics. These non-linear input to output characteristics often lead to signal distortion, especially at high frequencies where limited loop gain is available for correcting the output stage non-linearity by negative feedback. It is, therefore, desirable to provide high linearity in these output stages without the use of feedback.
In rail-to-rail output stages, it is often also desirable to maintain a known idling current flowing in each of the transistors of the output stage. This idling current is the current that flows in the transistors when the output stage is neither driving current into, nor sinking current from, a load that is connected to the output node. By maintaining an idling current in the transistors of the output stage, cross-over distortion in the output stage is kept to a minimum. However, this idling current can be difficult to control because of variations in manufacturing processes, temperatures, and power supply voltages of the components used to implement the output stage.